Intel announces its biggest architectural shifts in a generation

Intel’s 2021 Architecture Day previewed multiple upcoming products, with the likely highlight being the Alder Lake CPUs, which rethinks multi-core architecture by offering both efficient and performance cores, with a new Intel Thread Director selecting the optimal one to be used.

Raja Koduri, Sr. VP & General Manager, AXG Group, presenting at Intel Architecture Day

At Intel’s 2021 Architecture Day, the company unveiled what Raja Koduri, Sr. VP & General Manager, AXG Group and the lead spokesperson during the presentation, termed “our biggest shift in Intel architectures in a generation.” These included the company’s first detailed presentation of their forthcoming Alder Lake CPUs. It is distinguished by being an architecture with two different types of x86 cores to cover everything from PCs to mobile devices, and with an emphasis on performance rather than on power efficiency. Intel also discussed its upcoming Sapphire Rapids data centre architecture, their new intelligent Intel Thread Director workload scheduler, their new Xe Arc Alchemist discrete gaming graphic processing units, and their Ponte Vecchio data center GPU architecture with ultra-high compute density.

Koduri said these efforts originated from customer requests to have the ability to do workloads 1000x faster by 2025, something that was possible if multiplying effects were stacked on top of each other – in process and packaging, interconnect,  memory, software and architecture.

“Together, they give us the multiplicative effect, so all those 4x improvements could give us the 1000x effect we need,” he stated.

Alder Lake contains both Efficient and Performance cores. The new Efficient-core delivers 40% more single-threaded performance at the same power, compared to the Intel Skylake CPU, or the same performance while consuming less than 40% of the power.

“When we started this journey we wanted to deliver a scale microarchitecture, and our primary goal was to deliver the world’s most efficient x86 core,” said  Stephen Robinson, CPU Architect, and Intel Fellow. “We are introducing a new efficient x86 core microarchitecture with a breakthrough in multicore performance. A SkyLake core could consume 2.5 times more power to achieve the same performance. This can deliver the same throughout while consuming 80% less power.”

Koduri said that the other new performance core is designed for raw speed.

“It is focused on both general purpose and accelerated compute, and we designed the architecture to be wider, deeper and smarter,” said Adi Yoaz, Intel Fellow, and Director, Intel Core CPU Architecture. He stressed that the wider and deeper brings higher degrees of parallelism and higher, and also helps support large data and large code footprint applications. The performance-core provides a Geomean improvement of about 19%, across a wide range of workloads over the  current 11th Gen Intel Core architecture.

“This is our largest architectural shift in over a decade,” Yoaz said. “It is not only the highest performing CPU core intel has ever built, but will drive the next generation of compute.”

Alder Lake will also be Intel’s first performance hybrid architecture with the new Intel Thread Director. The Thread Director ensure that Efficient-cores and Performance-cores work seamlessly together, dynamically and intelligently assigning workloads from the start and optimizing the system for maximum real-world performance and efficiency. With intelligence built directly into the core, Intel Thread Director improves the multicore architecture by working seamlessly with the operating system to place the right thread on the right core at the right time.

“The challenges give to the team were to move beyond hybrid as we know it, and how to get both core types to work together intelligently to maximize performance,” said Rajshree Chabukswar – Senior Principal Engineer, Client Computing SoCs Group.

Intel also previewed its new discrete graphics microarchitecture, designed to scale to enthusiast-class performance for gaming and creation workloads. The Xe HPG microarchitecture features a new Xe-core, a compute-focused programmable and scalable element, and full support for DirectX 12 Ultimate. New matrix engines inside the Xe-cores (referred to as Xe Matrix eXtensions, XMX) accelerate artificial intelligence workloads such as XeSS, a novel upscaling technology that enables high-performance and high-fidelity gaming. Xe HPG-based Alchemist SoCs  will come to market in the first quarter of 2022 under the new  Intel Arc brand.

Sapphire Rapids is Intel’s next-generation data center processors. At the heart of Sapphire Rapids is a tiled, modular SoC architecture that delivers significant scalability while still maintaining the benefits of a monolithic CPU interface thanks to Intel’s EMIB multi-die interconnect packaging technology and advanced mesh architecture.

Finally, Ponte Vecchio is the most complex SoC Intel has ever built. It takes advantage of several advanced semiconductor processes, including Intel’s EMIB technology, and Foveros 3D packaging. The silicon is already providing greater than 45 TFLOPS FP32 throughput, greater than 5 TBps Memory Fabric bandwidth and greater than 2 TBps connectivity bandwidth.